XSLS

xsls, xspice, xpstar, xedif, xnle, xspef, xspf, xvhdl - extract an SLS, SPICE, PSTAR, EDIF, NLE, SPEF, SPF or VHDL network description out of the database

SYNOPSIS

xsls [-Mdefhirtv -C file -D name -X lib] cell xspice [-EHLNTadfghiklnoptuvxy -z name -C file -D name -O name -X lib] cell xpstar [-PQdfghikmnptuvxy -z name -C file -D name -F outfile -O name -X lib] cell xedif [-Icefhisv -C file -D name -F outfile -X lib] cell xnle [-fhlv -n nbulk -p pbulk -C file -D name -F outfile] cell xspef [-efhivxy -z name -C file -D name -F outfile -O name -X lib] cell xspf [-defghikonptuvxy -z name -C file -D name -F outfile -O name -X lib] cell xvhdl [-fhirv -C file -D name -F outfile -X lib] cell

OPTIONS

-C file

use the specified file as the control file.

-D name

define label name for conditional reading of the control file.

-f

send output to a file cell.sls (for SLS output) a file cell.spc (for SPICE output), a file cell.esp (for ESPICE output), a file cell.pstar (for PSTAR output), a file cell.edf (for EDIF output), a file cell.nle (for NLE output), a file cell.spef (for SPEF output), a file cell.spf (for SPF output), or a file cell.vhd (for VHDL output), instead of to stdout. With option -h, also a file is created for every sub-cell by NLE and SPEF.

-F outfile

send output to the specified file.

	-h		also extract all local sub-cells.
	-i		when option -h is used, also extract all imported sub-cells.
	-X lib		when options -hi are used, exclude specific certain libraries from the listing. This is very useful if you have a design with your own imported libraries. This option may be given several times. There are two possibilities:

(1) exclude all lib's starting with absolute path (for example "-X /usr/ocean"); (2) exclude the lib with basename (for example "-X primitives").

-v

enable verbose mode.

The following option are used for SLS circuit descriptions only:

	-M		extract a circuit description for SIMON.
	-r		do not generate extern network definitions for sub-cells that are not retrieved.

The following option is used for VHDL circuit descriptions only:

-r

generate also entity definitions for sub-cells that are not retrieved.

The following option is used for SLS, SPEF, SPF and EDIF circuit descriptions only:

-e

expand name arrays into single names.

The following options are used for SPICE circuit descriptions only:

	-E		extract an ESPICE circuit description.
	-H		extract an HSPICE circuit description (outputs area values as "m=area").
	-L		extract an ELDO circuit description.
	-N		when option -h is used, do not extract the sub-cell(s), but add a line ".include cell.spc" for each sub-cell to the output file.
	-T		send output to a CIRCUIT stream cell/spice instead of to stdout (Release 4 only).
	-a		instead of only numbers, use also names for node and terminal references.
	-l		(when not using option -a) generate a table that translates the node numbers to the node names.
	-o		omit model definitions for devices in the output file.

The following options are used for SPICE, SPF and PSTAR circuit descriptions only:

	-g		connect a large grounded resistor to each node of the two nodes that are connected by a net statement.
	-k		output all cells as sub-circuits and do not print a title card.
	-m		add model definitions for devices in the output file (SPICE default).
	-n		always add terminals for n-bulk connections.
	-p		always add terminals for p-bulk connections.
	-u		do not automatically add terminals for bulk connections.

The following options are used for SPICE, SPEF, SPF and PSTAR circuit descriptions only:

	-x		For SPICE and PSTAR, use node number = 0 for nodes whose name start with "gnd" or "GND". For SPEF and SPF, omit these nodes from the circuit description.
	-y		the same for nodes whose names start with "vss" or "VSS".

-z prefix

the same for nodes whose name start with prefix.

-O name

the same for the node that has this name. For SPEF and SPF, this option has a default value "GND".

The following options are used for PSTAR circuit descriptions only:

	-P		use Philips llrpd/llrnd models for penh/nenh and add "s=1".
	-Q		use Philips p/n models for penh/nenh.

The following options are used for SLS, SPICE, SPF and PSTAR circuit descriptions only:

	-d		use original database names to construct instance names.
	-t		do not output unconnected instances.

The following option is used for EDIF circuit descriptions only:

	-I		create schematic view instead of netlist view, implies option -c.
	-c		generate a Cadence compatible EDIF file. This requires the presence of a Nelsis-Cadence translation file "nls2cds.lib" in your working directory or in the process directory.
	-s		shift array indices into range 0..N.

The following options are used for NLE circuit descriptions only:

-l

long nets listing (gives all net/node names).

-n nbulk

use 'name' for n-bulk connections (default "vss").

-p pbulk

use 'name' for p-bulk connections (default "vdd").

DESCRIPTION

Xsls, xspice, xpstar, xedif, xnle, xspef, xspf, and xvhdl are programs to respectively extract an SLS circuit description, a SPICE circuit description, a PSTAR circuit description, an EDIF circuit description, an NLE circuit description, an SPEF circuit description, an SPF circuit description, or an VHDL circuit description out of the database. Default, only a circuit description of the cell itself is extracted and no sub-cells are extracted. When using the option -h the program will also extract all (local) sub-cells that are not a function (see "SLS: Switch-Level Simulator User's Manual") or a device. Whether or not a cell is a device is determined by (1) - for xspice/xpstar - by the contents of the control file, (2) by the use of the program xcontrol(1ICD) for new projects or device(1ICD) and/or putdevmod(1ICD) for old projects (see the manual pages of these programs), or (3) by a set of built-in device names: "res" for resistor, "cap" for capacitor, "nenh" for an n-enhancement transistor, "penh" for an p-enhancement transistor, "ndep" for a n-depletion transistor, "npn" and "pnp" for bipolar transistors and "d" for a diode. When extracting SPICE/PSTAR circuit descriptions, the program xspice/xpstar will automatically determine if n-bulk and/or p-bulk terminals should be added. This is determined from the bulk voltages that are required for the different devices that are part of the circuit. Under normal circumstances, this means that for circuits containing n-enhancement and depletion transistors n-bulk connections are added, and that for circuits containing p-enhancement transistors (also) p-bulk connections are added. For each bulk terminal, the program will automatically generate an appropriate voltage source, unless the option -o is used. Default, xspice will automatically add model descriptions to the network for the devices that are part of the network. These model descriptions are searched at the following places. First, model descriptions are searched in the library files that are specified in the control file. Second, the program will search for model descriptions that have been added to the database using the program putdevmod. Note that the device status must be set by xcontrol for new projects. For all devices that occur in the network and that have a model description available, these model descriptions will be added to the end of the network. The automatic inclusion of model descriptions can be omitted by using the option -o. The program xspf is a derivate of the program xspice. It adds Cadence Standard Parasitic Format (SPF) information to the SPICE alike output. Output is in proposed Detailed SPF (DSPF). It contains complete extracted circuit information intended to be used in conjunction with a circuit simulator for comprehensive simulation or with a timing analyzer for delay analysis. The program xspef generates output in Standard Parasitic Exchange Format (SPEF) as proposed by IEEE Standard Draft P1481, v1.0.4 April 8, 1997. The output is many aspects different from SPF. For xspf and xspef the netlist must contain conductor numbers. This netlists are generated with the space(1ICD) layout to circuit extractor. The program xnle generates netlists for the COMPASS Design System. It tries to read the "spicemod" file for a tox value. This tox value is used for the calculation of gate-capacitances of transistors.

THE CONTROL FILE

For xspice/xpstar/xnle/xspef/xspf, a control file may be used. This control file specifies the models that should be used for the devices, the location of the library files that contain the descriptions of these models, and the bulk voltages for the devices. The default name of the control file is "xspicerc". First, the program tries to read this file from the current working directory. Next, it tries to open the control file in the process directory. The format of a specification of a library file in the control file is as follows: include_library file_name where file_name is the name of the library file. First, the program tries to read the library file from the current working directory. Otherwise, the program tries to open the library file in the process directory. The format of a specification of a model for a device is as follows: model name orig_name type_name ( range_specs ) The orig_name has to be equal to the extracted device name, which is equal to the name specified in the element definition file. The type_name equals one of the SPICE standard device-model names, such as npn, pnp, nmos, pmos or d. This is initial implemented for bipolar models. The range_specs specifies the device geometries for which the model is valid (for a description, see the Space User's Manual). If the range_specs are left out, then the model is always valid. Only the following geometrical parameters can be specified in the range_specs: w, l, v, ae, pe and wb. The format of a specification of a prefix for a device-model is as follows: prefix name prefix The name can be the orig_name or the type_name. A new prefix overrides a previous specified prefix. For SPICE, the first letter of the prefix must be a legal standard device-model letter. For SPICE normally only one prefix letter is used. To use more prefix letters (max. 7) specify the following keyword: long_prefix The format of a specification of a bulk voltage for a device is as follows: bulk type_name value where value is the value of the bulk voltage for the device of type type_name. Up to a maximum number of 2 different values for bulk voltages may be specified in the control file. For a device, instance parameters may be specified as follows: params name { param_spec1 param_spec2 ... } The name can be the orig_name or the type_name and can optional be followed by the model_name. A new params-statement overrides a previous specified params-statement. With the params-statement the printing order of parameter values (with or without parameter name) can be changed. Normally invisible parameters can be made visible or used. Standard visible parameters can be left out or changed. The parameter specifications param_spec1, param_spec2 etc. each must have one of the following forms: parameter=value value parameter=$intern_par[<operator><value>] $intern_par[<operator><value>] with $intern_par denoting the actual value of a parameter that is internally (in the database) called 'intern_par' (for example $w, $l, $v, $area and $perim refer to respectively the width and length of a MOS transistor, the value of a resistor or capacitor and the area and perimeter of a junction capacitance). If the $intern_par does not exist in the instance attribute-list, the parameter specification is left out! If the $intern_par is a standard visible parameter, it is not more printed on the standard way. If the "$intern_par"-forms have a leading '!' sign, they are not printed. This is the way to skip a standard visible parameter. If the "$intern_par"-forms have two leading '!' signs, they are printed in the comment-part. The "$intern_par"-forms can optional be followed by an <operator> and a <value>. This <value> may also be another internal parameter. The operation is only done, if this internal parameter exists and is not zero. This <operator> can be a '+', '-', '*' and '/'. At last, you can additional use the '@' <operator> with a <string>. Denoting that the <string> must be printed after the value. Other program build-in internal parameters are:

	mname		the used model name
	mdl		the model 'l' subtract value (default 0)
	mdw		the model 'w' subtract value (default 0)
	msf		the scale factor for scalable models (default 1)

Note that by xspice -E and xpstar -P|-Q the following parameters are automatically scaled:

	w,l		with factor 1e6
	ps,pd		with factor 1e6
	peri		with factor 1e6 (parameter starting with...)
	as,ad		with factor 1e12
	area		with factor 1e12 (parameter starting with...)

As an example, the parameters of a junction diode ndif that was extracted using space(1ICD), and that will be simulated using HSPICE, may be specified as follows: params ndif { area=$area pj=$perim } Further, if the control file contains the keyword no_title a title card will not be printed at the top of the file, and if the control file contains the keyword as_subckt all cells will be printed as a sub-circuit. For xspice/xpstar/xnle/xspef/xspf, the parameter name_ground may be used to define the ground node name. This parameter is equivalent to the use of the option -O. name_ground string For xspef/xspf the following two specifications can be useful: The hier_name_sep parameter defines the DIVIDER character (default '/') that must be used: hier_name_sep char The inst_term_sep parameter defines the DELIMITER character (default ':') that must be used: inst_term_sep char For SPEF, this separator characters may only be '.', '/', ':' or '|'. The following specification is useful for all programs (with option -i): exclude_project path_name to exclude specific certain imported projects from the net-listing (see option -X).

CONTROL FILE CONDITIONALS

It is possible to use "#if", "#else" and "#endif" statements, to make the reading of the control file depended of the invoking program. To be seen, the '#' character must be the first character on a line. This conditional statements may not be nested like the C-preprocessor. Normally, from the top of the file reading is set to true. A "#else" statement changes the state from true to false or false to true. A "#endif" statement changes the state always to true. A "#if" statement changes only the state to true if one of the specified conditions is true for the invoking program (else to false). Note that you can also define one condition on the command line with option -D. The following conditions can be specified and are true for:

CDS

xedif -c

CADENCE

xedif -c

	EDIF		xedif
	NLE		xnle
	PSTAR		xpstar
	SIMON		xsls -M
	SLS		xsls (without -M)
	SPEF		xspef
	SPF		xspf
	HSPICE		xspice -H
	ESPICE		xspice -E
	ELDO		xspice -L
	SPICE		xspice (without -H|-E|-L)
	VHDL		xvhdl

The following example demonstrates its use: #if spice hspice include_library spice3x.lib #endif model dp pdiode d () model dw wdiode d () model dn ndiode d () #if SPICE hspice params d { area=$area1 !!$perim1 !!$perim2 } #endif #if Pstar params d { diffarea=$area1*1e12 perim=$perim1+$perim2 !$perim2 } #endif

THE LIBRARY FILE

$ xsls -h latch $ xspice -fhx invert

MODIFIED BY

S. de Graaf (EDIF, NLE, PSTAR, SPEF, SPF, VHDL),
F. Beeftink (SPICE bipolar models),
P. Elias (PSTAR option -Q),
M.S. Sneeuw (EDIF options -I -c).

cell.nmp

name map file from space, used by xvhdl

SEE ALSO

csls(1ICD), cspice(1ICD), putdevmod(1ICD), space(1ICD), xcontrol(1ICD).