Space: Accurate and Efficient Layout-to-Circuit Extractor
for Deep Submicron Technologies
Main Features
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Interconnect capacitance (numerical method or interpolation formulas).
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Substrate resistance (numerical method or interpolation formulas).
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Interconnect resistance extraction (fast numerical method).
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Frequency dependent interconnect modeling.
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Bipolar and MOS device extraction.
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CPU time linear to the size of the layout, memory better than linear.
More than 1,000,000 flat transistors per hour.
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Various input- and output formats, including GDSII, CIF, EDIF, Spice
and a number of platform-specific formats.
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Hierarchical, flat or mixed extraction, 45-degree layout.
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Friendly User Interface, Cadence version as an option.
Description
Space is an accurate layout-to-circuit extractor for deep submicron
MOS and bipolar circuits. It uses an efficient finite-element
method to accurately extract interconnect resistances. Compact and
accurate RC models for interconnects are generated that include
higher-order moments and that are guaranteed to be accurate up to a
user-defined signal frequency. Space uses a fast and comprehensive
interpolation method or an efficient boundary-element method for
capacitance extraction. Both methods have a time complexity that is
linear to the size of the layout and a sub-linear memory usage. To
allow the verification of substrate coupling effect, the extractor
can also extract substrate resistances. This is done using either a
3D boundary-element method to find accurate resistances for
relatively small circuits, or using an interpolation method that
quickly extracts substrate resistances for also large circuits.
Space is very fast, depending on the extraction options it can
extract over 300 transistors per second on an HP9000/735, or a
fully flattened 1,000,000 transistor chip in less than 1 hour.
Background
At Delft University, there is an important program on physical
modeling and verification of VLSI circuits, that is going on now for
more than ten years. Many of the research results obtained during
that period have been implemented in a layout-to-circuit extractor,
called Space. Space is being used extensively at several
universities and companies world-wide, and is also available
via OptEM.
For more information, see
our World Wide Web home page at
http://www.space.tudelft.nl,
write an email to
space-support-ewi@tudelft.nl,
or contact us at Delft University of Technology, Faculty of EE,
Mekelweg 4, 2628 CD Delft, The Netherlands. Telephone: +31-15-2786258
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